CS604 - Operating Systems - Lecture Handout 35

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Summary

  • Sharing in paging
  • Segmentation
  • Logical to physical address translation
  • Hardware support needed
  • Protection and sharing

Sharing in Paging

Another advantage of paging is the possibility of sharing common code. Reentrant (readonly) code pages of a process address can be shared. If the code is reentrant, it never changes during execution. Thus two or more processes can execute the same code at the same time. Each process has its own copy of registers and data storage to hold the data for the process’ execution. The data for two different processes will, of course, vary for each process. Consider the case when multiple instances of a text editor are invoked.
Only one copy of the editor needs to be kept in the physical memory. Each user’s page table maps on to the same physical copy of the editor, but data pages are mapped onto different frames. Thus to support 40 users, we need only one copy of the editor, which results in saving total space.

Sharing in paging

Segmentation

Segmentation is a memory management scheme that supports programmer’s view of memory. A logical-address space is a collection of segments. A segment is a logical unit such as: main program, procedure, function, method, object, global variables, stack, and symbol table. Each segment has a name and length. The addresses specify both the segment name and the offset within the segment. An example of the logical address space of a process with segmentation is shown below.

Logical address space with segmentation

For simplicity of implementation, segments are numbered and are referred to by a segment number, rather than by a segment name. Thus a logical address consists of a two tuple:

<segment-number, offset> or <s,d>

The segment table maps the two-dimensional logical addresses to physical addresses.
Each entry of a segment table has a base and a segment limit. The segment base contains the starting physical address where the segment resides in memory, whereas the segment limit specifies the length of the segment.

There are two more registers, relevant to the concept of segmentation:

  • Segment-table base register (STBR) points to the segment table’s location in memory.
  • Segment-table length register (STLR) indicates number of segments used by a program

Segment number s is legal if s < STLR, and offset, d, is legal if d < limit. The following diagram shows the hardware support needed for translating a logical address into the physical address when segmentation is used. This hardware is part of the MMU in a CPU.

Hardware support for segmentation

For logical to physical address conversion, segment number, s, is used to index the segment table for the process. If d < limit, it is added to the base value to compute the physical address for the given logical address. The segment base and limit values are used to relocate and bound check the reference at runtime.

Sharing of Segments

Another advantage of segmentation is sharing of code or data. Each process has a segment table associated with it, which the dispatcher uses to define the hardware segment table when this process is given the CPU. Segments are shared when entries in the segment tables of two different processes point o the same physical location. The sharing occurs at segment level, thus, any information defined as a segment can be shared.

Sharing in segmentation

The long-term scheduler must find and allocate memory for all the segments of a user program. This situation is similar to paging except that the segments are of variable length; pages are all the same size. Thus memory allocation is a dynamic storage allocation problem, usually solved with a best fit or worst fit algorithm.

Protection

A particular advantage of segmentation is the association of protection with segments.
Because the segments represent a semantically defined portion of the program, it is likely that ll the entries will be used the same way. Hence, some segments are instructions, whereas other segments are data. In a modern architecture, instructions are non-selfmodifying so they can be defined as read only. Or execute only. The memory mapping hardware will check the protection bits associated with each segment-table entry top prevent illegal access to memory, such as attempts to write into a read only segment. By placing an array in its own segment, the memory management hardware will automatically check that array indexes are legal and do not stray outside array boundaries.
The bits associated with each entry in the segment table, for the purpose of protection are:

  • Validation bit : if the validation bit is 0, it indicates an illegal segment
  • Read, write, execute bits

Protection

Issues with Segmentation

Segmentation may then cause external fragmentation (i.e. total memory space exists to satisfy a space allocation request for a segment, but memory space is not contiguous), when all blocks of memory are too small to accommodate a segment. In this case, the process may simply have to wait until more memory (or at least a larger hole) becomes available or until compaction creates a larger hole. Since segmentation is by nature a dynamic relocation algorithm, we can compact memory whenever we want.
If we define each process to be one segment, this approach reduces to the variable sized partition scheme. T the other extreme, every byte could be put in its own segment and relocated separately. This eliminates external fragmentation altogether, however every byte would need a base register for its relocation, doubling memory use. The next logical step- fixed sized, small segments, is paging i.e. paged segmentation.
Also it might latch a job in memory while it is involved in I/O. To prevent this I/O should be done only into OS buffers.